Дослідження впливу товщини SiO2 на зарядові ефекти на межі діелектрик-напівпровідник

Abstract

The modern development of nanoelectronics requires the creation of new transistor architectures that provide higher performance, lower energy consumption, and stable operation when scaled down to the nanoscale. One of the promising directions is the use of nanowire transistors, which, due to their three dimensional structure, allow for more effective control of the conduction channel and reduce short-channel effects. An important component of such transistors is the metal-insulator-semiconductor structure, where the dielectric layer plays a key role in shaping the electric field and controlling the charge state of the channel.