Особливості реалізації вузла швидкого перетворення фур’є на пліс архітектури FPGA

Abstract

The controller implements the FFT graph by generating addresses for memory banks, receives the control signal about the start of the conversion, issues the spectrum ready flag and provides the output spectrum array in binary inverse order. It seems reasonable to design the controller in HDL language. This makes it possible to write a universal controller, which makes it possible to build controllers for calculators with different FFT bases by changing a parameter in the text of the controller's program code and its subsequent «recompilation».