Моделi часових автоматiв в системах логiчного управлiння реального часу

Abstract

In this research was analyzed real-time systems which make some adjustments to the classical theory of automata, namely, they introduce delays in states and transitions of automatons, use temporal graphs of transitions, different types of delays, events as one form of input actions. The issues of construction of timed finite-state machines that take into account timing constraints, timeouts and output delays are considered. To describe these models in the language of the description of the VHDL equipment in computer aided design developed a three-process template in the style of automatic programming.