FPGA-based implementing fsm for emc

Abstract

The method of synthesis and implementation into FPGAs of Mealy FSMs is proposed. Synthesis is based on structural decomposition of initial circuit. FSM states are divided by classes and encoded separately in each class. The states are decoded in the second-level circuit. It leads to implementation of FSM in double-level structure where utilization of both, LUTs and embedded memory blocks, is applied. It leads to balanced usage of hardware resources of an FPGA de-vice. The method targets blocks for electromagnetic compatibility of radiotechnical devices.