Neuron Networks Design in STM32 Cube

Публікація:
Neuron Networks Design in STM32 Cube

dc.contributor.author	Воргуль, О. В.
dc.contributor.author	Свид, І. В.
dc.date.accessioned	2023-12-19T21:05:11Z
dc.date.available	2023-12-19T21:05:11Z
dc.date.issued	2023
dc.description.abstract	This article is devoted to analyzing the possibilities of using a neural network in a project based on STM32 microcontrollers. Support for many different libraries is discussed. The limited RAM size can be mitigated by using external flash memory connected to the USB port.
dc.identifier.citation	Vorgul O. Neuron Networks Design in STM32 Cube / O. Vorgul, I. Svyd // V International Scientific and Practical Conference Theoretical and Applied Aspects of Device Development on Microcontrollers and FPGAs (MC&FPGA-2023), Kharkiv, Ukraine. - рр. 56-59.
dc.identifier.uri	https://openarchive.nure.ua/handle/document/25109
dc.language.iso	en
dc.publisher	MC&FPGA
dc.subject	STM32
dc.subject	neural network
dc.subject	AI
dc.title	Neuron Networks Design in STM32 Cube
dc.type	Thesis
dspace.entity.type	Publication