Публікація:
Topological image processing for comprehensive defect and deviation analysis using adaptive binarisation

dc.contributor.authorBadanyuk, I.
dc.contributor.authorNevliudov, I.
dc.contributor.authorNikitin, D.
dc.date.accessioned2024-01-20T20:28:11Z
dc.date.available2024-01-20T20:28:11Z
dc.date.issued2023
dc.description.abstractThe subject of this article is the preparation for recognition and comparison of real topological images of printed circuit boards (PCBs) using adaptive image binarisation with an "automatic window" (the area for scanning the image "Block size"). The aim of the work is to improve the method of adaptive binarisation for images obtained by technical vision systems by developing an automatic algorithm for detecting the required value of the image binarisation window. Objectives: to analyse the subject area for the analysis of technical images of the topology of the SOE; to describe the finding of the global binarisation threshold (t) using the "Otsu" method; to perform global image binarisation; to calculate the standard deviation of binarisation; to process the results obtained to find the required value of the Block size; to test the developed algorithm in software. Results: an image processing algorithm with automatic adjustment of the "Block size" binarisation window was implemented and tested; software was developed using the proposed algorithm and the performance of global binarisation with an improved method of finding the "Block size" values for scanning an image in processing small elements of the SE topology was compared. This will allow solving the following issues: noise removal – removing noise from the image (noise can occur due to poor scan or photo quality, as well as due to the presence of small spots on the surface of the PCB); image segmentation – dividing the image into separate elements such as contours, zones and text (this process can be automated using image processing software); element detection – finding and separating individual elements such as resistors, capacitors and other components depicted on the topology. Conclusions: according to the results of the work, an algorithm for automatically adjusting the size of the scanning area "Block size" for binarisation of technological images of the SE topology has been developed. The following advantages of this algorithm can be distinguished: automatic finding of the optimal scanning area Block Size; resistance to image noise without the use of smoothing filters; finding details in areas of contrast difference.
dc.identifier.citationBadanyuk I. Topological image processing for comprehensive defect and deviation analysis using adaptive binarisation / I. Badanyuk, I. Nevliudov, D. Nikitin // Сучасний стан наукових досліджень та технологій в промисловості. – 2023. – № 1(23). – С. 164–173.
dc.identifier.urihttps://openarchive.nure.ua/handle/document/25413
dc.language.isouk
dc.publisherХНУРЕ
dc.subjectprocess image processing
dc.subjectadaptive binarization
dc.subjectOtsu method
dc.subjectGP topology
dc.subjectfinding "Block size"
dc.titleTopological image processing for comprehensive defect and deviation analysis using adaptive binarisation
dc.typeArticle
dspace.entity.typePublication

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