Matrix Manipulation Algorithms for Hasse Processor Implementation

Публікація:
Matrix Manipulation Algorithms for Hasse Processor Implementation

dc.contributor.author	Hahanov, V. I.
dc.contributor.author	Dahiri Farid
dc.date.accessioned	2017-06-19T10:54:37Z
dc.date.available	2017-06-19T10:54:37Z
dc.date.issued	2014
dc.description	Abstract – The processor is implemented in softwarehardware modules, which are based on the use of programming languages: C ++, Verilog, Python 2.7 and platforms: Microsoft Windows, X Window (in Unix and Linux) and Macintosh OS X. HDL-code generator makes it possible to automatically synthesize HDL-code of the processor structure from 1 to 16 bits for parallel processing corresponding number of input vectors or words.	uk_UA
dc.identifier.citation	Hahanov V.I., Dahiri Farid //Proceedings of IEEE East-West Design & Test Symposium (EWDTS’2014)	uk_UA
dc.identifier.uri	http://openarchive.nure.ua/handle/document/3917
dc.language.iso	en	uk_UA
dc.publisher	EWDTS	uk_UA
dc.subject	manipulation algorithms	uk_UA
dc.subject	matrix	uk_UA
dc.title	Matrix Manipulation Algorithms for Hasse Processor Implementation	uk_UA
dspace.entity.type	Publication

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