Методи застосування безперервної інтеграції у процесі розробки та верифікації RTL-описів

Abstract

The purpose of this work is to investigate the use of continuous integration infrastructure and tools in ASIC and FPGA development and verification. The study considers the integration of version control systems, automated testing pipelines, and static analysis tools to improve the reliability of RTL code. Particular attention is given to the Jenkins and GitHub platforms for automated execution of simulation tests, lint checks, and project consistency verification. The results demonstrate that combining continuous integration infrastructure with AI-assisted development tools can significantly improve design and verification efficiency and reduce the time required to detect errors