Please use this identifier to cite or link to this item: http://openarchive.nure.ua/handle/document/1983
Title: Models for Quality Analysis of Computer Structures
Authors: Murad, Ali Abbas
Chumachenko, S. V.
Hahanova, A. V.
Gorobets, A. A.
Priymak, A.
Keywords: Models
Quality Analysis
Computer Structures
Issue Date: 2012
Publisher: EWDTS
Citation: Murad Ali Abbas Models for Quality Analysis of Computer Structures//Murad Ali Abbas, Chumachenko S. V., Hahanova A. V., Gorobets A. A., Priymak A. //Proceedings of IEEE East-West Design & Test Symposium (EWDTS’2012)
Abstract: The methods for estimating computational structures and searching the shortest paths between the pair of nodes are presented. A criterion for evaluating the effectiveness of computational structures based on the graph model of the functional blocks of digital systems-on-chips is developed. A modified Dijkstra's algorithm to determine the average cost of interconnections in computing architecture for every pair of nodes is proposed. Verification of the criterion, when evaluating the effectiveness of different topologies of computational structures is performed. Creating effective computational structures is related not only to increasing the speed of primitives, but also with the topology of interconnections between them, which can significantly improve the performance of parallel processing data due to additional expensive connections. It is therefore necessary to have criteria for evaluating performance, taking into account not only transaction time between the nodes, but the hardware redundancy, which considerably reduces the average time of receiving and transmission of information between the primitive computing components. Such criteria can be used to evaluate the effectiveness of graph models of local and global computer networks, urban infrastructure of road communications, as well as the traffic flows in order to identify bottlenecks affecting the traffic. The problem of finding such criteria is related to the minimization of the computational cost for determination of all possible minimal paths between nodes of pairs. The aim of research is development of criteria for evaluating the effectiveness of computational structures, based on graph model of interconnections of functional blocks, which make it possible to determine the quality of the topological architectures of digital systems-on-chips. The objectives: 1) Analysis of methods for estimating the computational structures and finding the shortest paths between nodes of pair. 2) Development of criteria for evaluating the effectiveness of computational structures, based on graph model of the functional blocks of digital systems-on-chips. 3) Modification of Dijkstra's algorithm to determine the average cost of interconnections of computing architecture for a node pair. 4) Verification of the criteria when evaluating the effectiveness of different topologies of computational structures.
URI: http://openarchive.nure.ua/handle/document/1983
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