Структурное описание объекта моделирования базовых конструкций моделей на языке VHDL - Астахова, Е. С.; Лю, Чан; Панченко, А. Ю.; Чернышов, Н. Н. (ХНУРЭ, 2010)
Structural describe design object as basic construction of models on language VHDL is described. System is totality of components, which united in signals. Components are object of design also, but they have more low level of hierarchy structure and production solutio construction. Evry component can be present as components totality etc.,as of yet, on howe wer level had not given conductal describe for components architecture or don't be used predetermine component.
Keywords: описание объекта моделирования; модель объекта (instantiation); декларация компонента; оператор генерации (Generate)