Models and Methods for Verification and Diagnosis of SoC HDL-code

Hahanov, V. I.Gharibi, W.Litvinova, E. I.Chumachenko, S. V.2016-09-022016-09-022010Models and Methods for Verification and Diagnosis of SoC HDL-code / V. Hahanov and all // Радиоэлектроника и информатика : науч.-техн. журн. – Х. : Изд-во ХНУРЭ, 2010. – Вып. 4. – С. 36-46.http://openarchive.nure.ua/handle/document/1980Xor-metrix for object relations in a vector logic space and a structural testing model are proposed. Assertion-based models and methods for the verification and diagnosis of HDL-code functional failures, which make possible to reduce considerably time-tomarket of software and hardware, are developed. An architectural model of multimatrix reduced logical instruction set processor for embedded diagnosing is offered.entime-to-marketXor-metrixverificationHDL-codeModels and Methods for Verification and Diagnosis of SoC HDL-codeArticle