Please use this identifier to cite or link to this item:
Full metadata record
DC FieldValueLanguage
dc.contributor.authorHahanov, V. I.-
dc.contributor.authorDahiri, F.-
dc.identifier.citationHahanov V.I., Dahiri Farid //Proceedings of IEEE East-West Design & Test Symposium (EWDTS’2014)uk_UA
dc.descriptionAbstract – The processor is implemented in softwarehardware modules, which are based on the use of programming languages: C ++, Verilog, Python 2.7 and platforms: Microsoft Windows, X Window (in Unix and Linux) and Macintosh OS X. HDL-code generator makes it possible to automatically synthesize HDL-code of the processor structure from 1 to 16 bits for parallel processing corresponding number of input vectors or words.uk_UA
dc.subjectmanipulation algorithmsuk_UA
dc.titleMatrix Manipulation Algorithms for Hasse Processor Implementationuk_UA
Appears in Collections:Кафедра автоматизації проектування обчислювальної техніки (АПОТ)

Files in This Item:
File Description SizeFormat 
Maket_IEEE_3_2014_new-split-merge.pdf906.3 kBAdobe PDFView/Open

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.