Variants of Topology Editing Strategy in the Subsystem of Printed Circuit Boards Manufacturability Improvement

Публікація:
Variants of Topology Editing Strategy in the Subsystem of Printed Circuit Boards Manufacturability Improvement

dc.contributor.author	Panchak, R.
dc.contributor.author	Kolesnyk, K.
dc.contributor.author	Lobur, M.
dc.date.accessioned	2016-08-11T11:12:36Z
dc.date.available	2016-08-11T11:12:36Z
dc.date.issued	2011
dc.description.abstract	This paper focuses on the variants of printed circuit boards topology editing strategies implemented in the subsystem of automatic printed circuit boards topology editing. Depending on the requirements for printed circuit board topology, a subsystem user can create variants of editing strategies in order to minimize the amount of the technologically justified places with a minimum clearance between the elements of the topology.	uk_UA
dc.identifier.citation	Panchak, R. Variants of Topology Editing Strategy in the Subsystem of Printed Circuit Boards Manufacturability Improvement / R. Panchak, K. Kolesnyk, M. Lobur // Радиоэлектроника и информатика : науч.-техн. журн. – Х. : Изд-во ХНУРЭ, 2011. – Вып. 4. – С. 24-27.	uk_UA
dc.identifier.uri	http://openarchive.nure.ua/handle/document/1812
dc.language.iso	en	uk_UA
dc.publisher	ХНУРЭ	uk_UA
dc.subject	printed circuit board manufacturability	uk_UA
dc.subject	printed circuit board topology	uk_UA
dc.title	Variants of Topology Editing Strategy in the Subsystem of Printed Circuit Boards Manufacturability Improvement	uk_UA
dc.type	Article	uk_UA
dspace.entity.type	Publication